Array Voltage Considerations: Page 4 of 6

LOW DC VOLTAGE

Inverter specification sheets seem simple enough to use, but some knowledge of how inverters work is required to interpret them. For example, in contrast to an inverter’s published high dc voltage limit, the low dc voltage limit for most inverters is a variable that changes in response to the grid voltage. In addition, the voltage that an array is capable of, given specific environmental conditions like irradiance and cell temperature, diminishes over time. Designers must also account for the effects of module voltage tolerance when performing acceptable low dc voltage calculations. Many of the most egregious PV source-circuit design mistakes are due to a failure to account for these combined factors; these designs result in array voltages that are too low for the inverter.

High ac grid voltage. While a manufacturer might state that the low dc voltage for its inverter is 330 Vdc, this is usually the lowest acceptable dc input voltage at the nominal grid voltage. For residential systems, the nominal single-phase voltage is 240 Vac; for larger systems, the nominal 3-phase voltage might be 208, 240 or 480 Vac. As the ac voltage varies above nominal, the minimum dc input voltage rises as well.

If the ac voltage rises 5%, which is possible on hot summer afternoons, the minimum dc voltage also rises 5%. Therefore, an inverter with a minimum voltage rating of 330 Vdc has a minimum voltage of 347 Vdc under those 5% higher ac voltage conditions. This condition often occurs at precisely the time when the array dc voltage is at its lowest level due to the high ambient temperatures. While 5% higher ac voltage is unusual, 2–3% higher voltage is common on hot days, since utilities raise voltage to enable them to run more power through their distribution circuits to satisfy air conditioning loads.

Array degradation. System designers must be aware that the minimum voltage from a PV module, and thus an array, changes over time. All PV arrays degrade in power, both in voltage and current. At a minimum, designers should factor in an annual power loss of 0.5%.

Since no conclusive data exists regarding how much of this loss is expressed in voltage versus current, a reasonable design decision is to equally allocate the loss between current and voltage. This means that a typical array should be designed with the understanding that it will lose 0.25% or more of its voltage each year. Over 25 years, a minimum loss to calculate would be about 6% (0.997525 = 0.939).

Voltage tolerance. While PV modules may have relatively tight power tolerances (averaging about +3%/-3%), the voltage and current tolerances are typically much larger—perhaps as large as +10%/-10%. This uncertainty is difficult to plan for in design. If a module is relatively low in voltage, its power specification is met by having an offsetting high current, because power is the product of volts times amps. Given the lack of information on module voltage tolerance available, it is best to err on the side of caution and assume an extra 5% dc voltage loss in the array.

Combined impacts. To arrive at an optimal minimum dc voltage for the array, add the effects of all the issues together. Currently, string-sizing programs calculate the minimum voltage based on the temperature-adjusted maximum power voltage of the module. If the high ac voltage accounts for 3%, array degradation for 6%, and module voltage tolerance for 5%, then the array should be designed to operate with a voltage that is at least 14% higher than the temperature-adjusted maximum power voltage for a given location.

The way to avoid problems associated with low dc voltage is to increase the array voltage. When using string-sizing programs, the simple rule I recommend is to eliminate the lowest voltage option—the source circuit with the least number of modules in series. If possible, throw away the two shortest source-circuit options. For example, if the sizing program allows 12, 13, 14 or 15 modules in series, limit the choices to 14 or 15 modules.

While this approach may work well in general, it is important for system designers to perform detailed low dc voltage calculations for specific array configurations. Designers should use the highest expected continuous ambient temperature for calculation purposes. According to the Copper Development Association, the highest ASHRAE temperature data that is likely to create a 3-hour continuous condition, per the definition of continuous found in NEC Article 100, is the 2% Annual Design Dry Bulb Temperature, which is also found in Appendix E of the Expedited Permit Process for PV Systems. For designers who feel that the ASHRAE 2% temperature is not high enough, the same table also includes ASHRAE Extreme Annual Mean Maximum Design Dry Bulb Temperature data, which can be used for even more conservative voltage or ampacity calculations.

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