Array Voltage Considerations: Page 3 of 6
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This does not mean that there is a 50:50 chance that the maximum voltage to the inverter will be exceeded in a given year. Remember that peak irradiance must accompany this temperature, and the modules must perform as if they were new and perfectly matched. Ultimately, engineering design involves a series of decisions based on the likelihood of an occurrence and the consequences should the worst case happen. Good system engineering balances valid concerns to develop a design that keeps all the equipment operating properly within acceptable limits. Using the record low temperature does not eliminate the statistical possibility of exceeding an inverter’s maximum input voltage; it simply lowers the possibility relative to a higher temperature. I recommend using the ASHRAE low design temperature data unless there is a specific need for more conservative design data.
Low Design Temperature
To find the record low temperature for any location in the US, go to Weather.com’s Monthly Climatology web page at the following URL and specify the desired zip code: weather.com/weather/climatology/monthly/zipcode.
For design purposes, however, a location’s record low temperature is very conservative, generally lower than the minimum expected ambient temperature at peak irradiance. The Extreme Annual Mean Minimum Design Dry Bulb Temperature data published by ASHRAEAE generally provide better low temperature design data in terms of statistical validity. These data are included in Appendix E of the Expedited Permit Process for PV Systems, which is available at the website for the Solar America Board for Codes and Standards.
One note of caution, however: All generalizations have exceptions. For example, a steeply tilted PV array in a high-altitude location subjected to snow reflectance may experience extreme open-circuit voltage conditions that even record low temperature design calculations will underestimate.
Low Array Voltage
The set of I-V curves in Figure 2 assumes source circuits of 14 Evergreen ES-195 modules, with 20 circuits connected in parallel to a Satcon PVS-50 inverter with a 305 Vdc minimum MPPT voltage. The ASHRAEAE low design temperature is 0°C, and the ASHRAEAE 2% design temperature is 45°C. The latter results in a minimum array operating voltage of 289.8 Vdc. (To see the underlying design calculations, refer to “Array to Inverter Matching,” December/January 2009, SolarPro magazine.)
As evidenced by the intersection of the dotted line and the I-V curve for the ASHRAEAE 2% design temperature, on the hottest days of summer when the solar resource is greatest, the inverter is unable to operate the array at its maximum power point. Any energy the inverter cannot harvest is money left on the table. This is clearly not an acceptable array design.
Adapting the design to 15 modules per source circuit gets the minimum array operating voltage up to 310.5 Vdc, which is higher than the minimum inverter MPPT voltage. However, this does not provide adequate margin to account for the cumulative effects of high ac grid voltage, array degradation or voltage mismatch. The best array design is actually 16 modules per source circuit, which results in a minimum array operating voltage of 331.2 Vdc, before any other derates are applied, and a maximum open-circuit voltage of 571.2 Vdc.